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1.1.1 Structure and function of the processor

A-Level Computer Science

Fill in the blanks with the correct words. Click "Check Answer" to see if you're right!

Term: Cache

Definition:

Fast access speed onboard the CPU. Stores frequently used instructions and data. Faster to fetch instructions and data from cache than
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Term: Register

Definition:

Tiny areas of fast access speed inside the . Examples include: MDR, MAR, ACC, PC, CIR in a Von Neuman CPU.
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Term: MDR

Definition:

Memory Register: A register in the CPU that stores data being transferred to and from the primary memory.
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Term: Bus

Definition:

A bus is a pathway that components of a computer. Data, and control signals are transferred using the specific busses.
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Term: Address Bus

Definition:

Carries the location address of the or data to be accessed.
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Term: Control Bus

Definition:

Carries control between the CPU and other components such as primary memory. For example, a from memory signal.
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Term: Fetch-Decode-Execute

Definition:

The complete cycle of fetching an instruction from , it and carrying it out.
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Term: Clock Speed

Definition:

The at which the CPU can fetch, decode and an instruction. Measured in Hertz.
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Term: Cores

Definition:

A complete copy of the processing unit of a CPU. Dual core means processing units, which means 2 instructions can be fetched, decoded and executed .
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Term: Cache

Definition:

Fast access memory unit onboard the . used for fetched instructions and data which speeds up the FDE cycle.
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Term: Pipelining

Definition:

Sequencing instructions so that an instruction can be while another is being while another is being . Speeds up processing.
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Term: Von Neumann Architecture

Definition:

Computer architecture. A single unit manages program control flow following a linear sequence of fetch-decode-execute. and instructions are stored in the same memory block.
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Term: Harvard Architecture

Definition:

Computer architecture with separate memory and busses for instructions and .
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Term: Contemporary Architecture

Definition:

Computer architecture that uses principles from both Von Neuman and and other innovations.
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Term: ALU

Definition:

Arithmetic Logic . Performs calculations (e.g x = 2 + 3) and comparisons (e.g., IF x > 3) in the CPU.
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Term: CU (Control Unit)

Definition:

Sends control to manage how data moves around the .
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Term: PC

Definition:

Program . A register which stores the address of the instruction to be executed.
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Term: ACC

Definition:

Accumulator: It is used to hold the data currently being processed by the ALU. Also stores data coming from devices and going to output devices.
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Term: MAR

Definition:

Memory Register: A register in the CPU that stores the address of the memory location currently in use. In the fetch phase, this would be the address of the instruction being loaded; in the execute phase, it would be the address of the data being used.
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Term: CIR

Definition:

The Instruction Register (CIR) is a register within the control unit that stores the instruction from memory. It holds this instruction while it is being decoded and executed by the processor.
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Term: Data Bus

Definition:

Carries data the CPU's MDR and primary .
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